1. Field of the Invention
The present invention relates to a fabrication method for a semiconductor memory device, and in particular, to an improved fabrication method of a level semiconductor PN junction array which allows a significant increase of growth in the horizontal direction so that a PN junction array structure can formed by introduction or doping of a CCl.sub.4 or CBr.sub.4 gas when a GaAs or AlGaAs epitaxial layer is grown on a GaAs substrate having a V-shaped or U-shaped recess by metalorganic chemical vapor deposition (hereinafter, called MOCVD).
2. Description of the Prior Art
Recently, studies on the fabrication of photoelectro devices on the basis of a chemical composition semiconductor are being conducted, and such photoelectro devices fabrication requires a complicated process.
If a selective epitaxy technology which has been recently studied as one of the MOCVD methods is employed, a three dimensional epitaxial layer can be desirably embodied by putting a test piece in a reaction tube one time without going through a complicated fabrication process for a semiconductor device. As a result, since the complicated construction of a semiconductor device is formed during the growth of a epitaxial layer without being exposed to air during the process, a default and damage on junction boundary surfaces as well as undesired oxidation of the surface of the epitaxial layer can be effectively prevented.
However, in fabricating a photoelectro device for a chemical composition semiconductor according to the conventional art in which the epitaxial layer is formed by the MOCVD method, a horizontal direction PN junction cannot be realized, and therefore, in semiconductor devices using light, the PN junction exists within the semiconductor device, and the light is absorbed into the epitaxial layer before it reaches a PN junction layer, resulting in a large optical loss.